1. Field of the Invention
The present invention relates to a semiconductor device having a semiconductor chip housed in a package of molded resin, and, more particularly, to the inner structure of the semiconductor device.
2. Description of the Related Art
FIG.9 is a perspective view of a conventional semiconductor device, with a portion cut away to show its inner structure. FIG.10 is an enlarged view of a portion of the internal structure of FIG.9. The semiconductor device shown in the figures is fabricated through wire bonding and transfer molding. A semiconductor chip 7 is die-bonded onto a diepad 12. The diepad 12 and leads 5 are integral parts of a lead frame. A plurality of electrode pads 8 are disposed along the top edge portion of the semiconductor chip 7. The inner leads 5a of the leads 5 extend inwardly toward the semiconductor chip 7 from a circumference of the device. Each of the electrode pads 8 on the semiconductor chip 7 is connected to a corresponding inner lead 5a by a metallic Fine wire 6. The semiconductor chip 7 is then sealed into a package made of epoxy resin or the like.
In a wire bonding process, metallic fine wires, typically gold (Au) wires of 25 .mu.m diameter to 30 .mu.m diameter, are used. The metallic fine wire penetrates a bonding tool called a capillary (not, shown), and the end of the metallic fine wire 6 at the capillary tip is melted and takes a spherical form.
Further in wire bonding process, ultrasonic energy is applied to perform bonding with the ball portion of the metallic fine wire 6 pressed on an electrode pad 8 on the semiconductor chip 7. The capillary is moved in accordance with an orbit with a predetermined shape, forming a curved loop. The metallic fine wire 6 is then pressed onto an inner lead 5a to which that wire 6 is to be connected, and ultrasonic energy is applied to bond the metallic fine wire 6, completing the full bonding process of one metallic fine wire 6.
One wire bonding process is performed in the above-described procedure. This process is repeated until all necessary interconnections are completed between each electrode pad 8 on the semiconductor chip 7 and the corresponding inner lead 5a. After that, in a transfer molding process, the above structure is sealed into a package 10 made of epoxy resin or the like.
The conventional semiconductor devices are constructed as mentioned above. In the conventional semiconductor devices, however, the inner leads must be routed around the semiconductor chip; space must be provided inside the package around the semiconductor chip, in order to allow metallic fine wires to be looped; and the electrode pads of the semiconductor chip must be arranged on peripheral edges of the semiconductor chip so that the metallic fine wires are not be shorted mutually, or to any of the components of the device. The above-described limitations of the conventional semiconductor device presents difficulty in increasing the size of the semiconductor chip without increasing its package size. Over the past several years, as integrated circuits have greatly increased in their level of integration and functional performance, the size of the semiconductor chip has commensurately increased. Contrary to the packaging consideration a downsizing of electronic equipment is more and more demanding requirements. The conventional semiconductor device which is fabricated using the wire bonding technique is unable to cope with the two contradictory requirements: the semiconductor chip must become larger, while its package must remain small.